Browse Prior Art Database

Digital Wrap Built-in Self-Test for Future AWD System

IP.com Disclosure Number: IPCOM000119553D
Original Publication Date: 1991-Feb-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Nguyen, LD: AUTHOR

Abstract

This technique may be used in conjunction with the pseudo-random built-in self-test (BIST) of the RISC System/6000* processor to extend the BIST coverage to include the I/O subsystem.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Digital Wrap Built-in Self-Test for Future AWD System

      This technique may be used in conjunction with the
pseudo-random built-in self-test (BIST) of the RISC System/6000*
processor to extend the BIST coverage to include the I/O subsystem.

      Refering to the figure, the Digital Wrap Built-In Self-Test (DW
BIST) consists of the necessary circuitry so that upon the system
bring-up initialization, the digital output data leaving the digital
subsystem under test can be routed to the digital input device on the
LRM (Line Replaceable Module).  An appropriate software routine is
stored in ROM which could be located in the OCS (On Card Sequencer)
of the RISC System/6000 along with test data, to control the data
transfer and compare the data received with the data transmitted.  A
suitable error code is flashed on the operator panel display when a
mismatch occurs.

      There are various options open to the architecture group as how
to route the signal back to the processor.  No additional hardware
would be required if the I/O is bidirectional.  In this case, we
should use tristate drivers.  Another way is to add digital gates to
wrap the inputs around the outputs.  The following sequence is
executed:
      1. Initialize. Input signal to the LRM: test begin mode.
      2. Initialize the subsystem under test.
      3. Enable all the wrap gates that will be used for that
particular test.
      4. Apply the ROM test patterns to the output devices.
      5. The data is routed from the output devices through the
proper enabled wr...