Browse Prior Art Database

Temperature And Process Compensated CMOS Off-Chip Driver

IP.com Disclosure Number: IPCOM000119577D
Original Publication Date: 1991-Feb-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Atallah, FI: AUTHOR [+2]

Abstract

Described is a CMOS off-chip driver (OCD) that has improved performance and is implemented on a relatively small surface area. The OCD includes stacked FET devices with a pair of lower devices, one of type P and the other of type N, and the total W/L ratio of the P and N channel devices being smaller than a single lower PFET device which is usually used. The figure illustrates the design.

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Temperature And Process Compensated CMOS Off-Chip Driver

      Described is a CMOS off-chip driver (OCD) that has
improved performance and is implemented on a relatively small surface
area.  The OCD includes stacked FET devices with a pair of lower
devices, one of type P and the other of type N, and the total W/L
ratio of the P and N channel devices being smaller than a single
lower PFET device which is usually used.  The figure illustrates the
design.

      Since most circuits driven by the OCD will have a switching
threshold between 1.5 and 2.0 volts (TTL, for example), the time to
which these levels are attained is of paramount importance.  The
reason for using a P-type device is to provide a full voltage
uplevel, since some technologies might require it.  The reason for
using an NFET device is because the mobility associated with it is
approximately 2.5 times better than the PFET.  However, the NFET will
only achieve a maximum output voltage of Vgs-Vt . If the applied
voltage is at the worst case VDD (VDD-10%), then the output voltage
will be at 4.5 volts -

Vt.

  Since the threshold of the NFET is
affected by the source (output) potential, the threshold voltage can
be as high as 2.0 volts.  To limit this body effect, the source of
the NFET device can be tied to WELL/SUBSTRATE in a PWELL/NWELL
technology, respectively.  In this device arrangement, the NFET
device will dominate the rise of the output until it reaches Vgs-Vt,
which is beyond the switching t...