Browse Prior Art Database

Hardware/Microcode Revision Level Synchronization Method

IP.com Disclosure Number: IPCOM000119678D
Original Publication Date: 1991-Feb-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Bakke, BE: AUTHOR [+4]

Abstract

A method for synchronizing hardware and microcode levels and supporting the coexistence of multiple levels of hardware and microcode is disclosed. This method does not require any manual intervention.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 78% of the total text.

Hardware/Microcode Revision Level Synchronization Method

      A method for synchronizing hardware and microcode levels
and supporting the coexistence of multiple levels of hardware and
microcode is disclosed.  This method does not require any manual
intervention.

      An I/O Processor (IOP) can be logically partitioned into 3
major functional units (see Fig. 1):
      1.  System Adapter
      2.  Device Adapter(s)
      3.  Microcontroller

      The System Adapter and each Device Adapter are uniquely memory
mapped in the Microcontroller's address space.  This method is shown
in Fig. 2 where each "Ax" is an architected boundary in the
microcontroller's address space and "size" is the amount of address
space required by an individual ASIC.

      Each ASIC contains a chip signature register with the following
attributes:
   Located at an architected fixed offset within the chip's
individual address space.
   A read-only register
   Unique ASIC identifier/name
-  ASIC revision level

      Microcode uses the signature register to:
      1.  DETERMINE THE TYPE OF ASIC:  Microcode will determine which
Device Adapter(s) are attached, identify which code can be used to
handle each chip, and execute that code.  This late binding allows a
single microcode load to run all configurations.  This allows
multiple Device Adapters to be mixed and matched on a single I/O
Processor without having to know the configuration of the IOP...