Original Publication Date: 1991-Feb-01
Included in the Prior Art Database: 2005-Apr-02
This article describes a microprocessor instruction which gives the microprocessor the ability to do alphabetic uppercase/lowercase- tolerant compares in a single operation.
describes a microprocessor instruction which
gives the microprocessor the ability to do alphabetic
uppercase/lowercase- tolerant compares in a single operation.
microprocessors include a compare instruction which will
set a processor status flag based on a numerical comparison of two
operands. Typically, this comparison is performed by subtracting one
source operand from the other. The result of this subtraction is used
to set condition code flags inside the central processing unit (CPU).
Based on the status of these flags, a program can determine if the
two operands are equal to each other, or if not equal, which operand
is numerically larger. Since most systems represent alphabetic data
using either the ASCII or EBCDIC coding systems, the compare
instruction can also operate on character data.
such as word processors and database managers,
make extensive use of the compare instruction to search for character
strings. Character string searches are either case-sensitive or
case- tolerant. In a case-sensitive search, a compare operation
between the letters "t" and "T" would indicate that the characters
are different. Conversely, a case-tolerant search for lowercase "t"
in a file would match on an uppercase "T" because case is ignored in
this type of search. Another example is that a case-sensitive search
for the string "theater" in a file would fail to find the string
"Theater," whereas the case-tolerant search would indicate a match.
For this reason, case tolerant searches are common in many software
microprocessor compare instruction actually compares
the binary-coded equivalent of a character, the compare instruction
is always case-sensitive. In order to perform a case-tolerant search
for a character string in a file, additional processing must be
performed prior to executing the compare instruction. A
microprocessor instruction is disclosed herein which performs
case-tolerant text comparisons in a single operation. By providing
an instruction which is optimized for text comparisons, string
searches in applications, such as word processing, can be performed
in less time and with fewer microprocessor instructions.
microprocessor instruction of this disclosure is the
Compare Text (CPTX) operation and has the syntax:
CPTX operand_1, operand_2
typically a location in storage or a
microprocessor register. Operand_2 can be an immediate value such as
the character constant 't,' or the contents of a register. The CPTX
instruction will perform a bit-wise comparison of the data in the two
operands and will set a microprocessor status flag, the Zero Flag
(ZF) to ONE if the operands are the same character (regardless of
case). Conversely, if the operands are indeed different characters,
the ZF will be set to a ZERO. The state of the ZF status...