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Browse Prior Art Database

Four-to-One LSSD Converter

IP.com Disclosure Number: IPCOM000119841D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Bredin, F: AUTHOR [+3]

Abstract

The 4-to-1 LSSD converter is a system intended for fast switching of any array configuration to another one in accordance with LSSD rules.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Four-to-One LSSD Converter

      The 4-to-1 LSSD converter is a system intended for fast
switching of any array configuration to another one in accordance
with LSSD rules.

      The classical LSSD configuration combines one +L2 latch to each
+L1 latch; the present proposal associates one +L2 to every four +L1
latches.

      The novel 4-to-1 LSSD converter 10 basically consists of four
latches, one 4-to-1 multiplexer, one +L1 output driver and one + L2
latch.  The figure shows the application block diagram.

      The four latches allow the storage of the data coming from the
array. They are simultaneously selected with either an internal clock
(C clock (CCLOCK)) or an external clock (A clock (ACLK)). The Scan In
(SI) signal is also provided to the +L1 latch.

      The 4-to-1 multiplexer is controlled by both most significant
bits (An and An-1).  It is ready when the +L1 data arrive. One out of
four data is outputted to the +L1 buffer and then to the + L2 latch,
so that no performance impact is seen by the user.

      The + L2 latch is controlled by the +B clock (BCLK).

      As shown in the figure, the basic principle may be generalized
to the whole array.

      The advantages of the novel 4-to-1 LSSD converter are:
1. Reduced chip area.
2. Physical internal structure unchanged.
3. No performance impact.
4. Logical LSSD rules preserved.
5. Easy implementation.