Browse Prior Art Database

COP/OCS Assisted System Performance Monitoring

IP.com Disclosure Number: IPCOM000119849D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 3 page(s) / 88K

Publishing Venue

IBM

Related People

Golla, RT: AUTHOR [+4]

Abstract

This is to propose the use of the Common On-chip Processor (COP) and the accompanying Off-Card Sequencer (OCS) in a fashion that will allow chip/system-based performance monitoring (i.e., counting of various internal chip events). The performance monitoring will be implemented in such a way that this extra circuitry will not be intrusive upon the functional logic of the respective chip. Furthermore, this added performance monitoring will be controlled via software (PIO Load/Stores) running on the actual 'TARGET' hardware.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 67% of the total text.

COP/OCS Assisted System Performance Monitoring

      This is to propose the use of the Common On-chip
Processor (COP) and the accompanying Off-Card Sequencer (OCS) in a
fashion that will allow chip/system-based performance monitoring
(i.e., counting of various internal chip events). The performance
monitoring will be implemented in such a way that this extra
circuitry will not be intrusive upon the functional logic of the
respective chip.  Furthermore, this added performance monitoring will
be controlled via software (PIO Load/Stores) running on the actual
'TARGET' hardware.

      The COP, as shown in Fig. 1, would have the following
capabilities added:  1) Additional commands to support this new
function (enable/disable performance data, and select performance
submodes) (these additional commands also imply additional COP
primary outputs --- to the chip internal logic only);  2) Additional
Clocking controls (stop_L1/L2, scangate, U and/or D clocks), and
additional support for the scan string that will contain the
performance-monitoring counters.

      As a consequence of adding these functions to the COP, the OCS
will need the added capability of communicating with the CES.  This
will be done (Fig. 2) via PIO load/stores to a register (two
registers set up as a mailbox scheme, meaning, the CEC can write to a
register that the OCS can only read; likewise, the OCS can respond
via a write to a register that can only read).

      Once the monitoring proc...