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Technique to Passively Interrupt a Processor

IP.com Disclosure Number: IPCOM000119856D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 75K

Publishing Venue

IBM

Related People

Bowen, NS: AUTHOR [+2]

Abstract

Operating systems have the need to maintain status regarding facilities that are external to the processor (e.g., I/O devices). There are two basic approaches, namely, having the device interrupt the instruction execution or having the operating system actively poll the device to determine the status. This article describes a technique which allows an external device to notify the processor without interrupting the instruction execution on the processor.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Technique to Passively Interrupt a Processor

      Operating systems have the need to maintain status
regarding facilities that are external to the processor (e.g., I/O
devices).  There are two basic approaches, namely, having the device
interrupt the instruction execution or having the operating system
actively poll the device to determine the status.  This article
describes a technique which allows an external device to notify the
processor without interrupting the instruction execution on the
processor.

      When the processor starts an asynchronous request (e.g., an I/O
request) it passes two new parameters, as described here.  The first
parameter is the address of a storage location.  The microcode that
would normally present the interrupt to the processor performs the
following operation:
      The contents of a new architected memory location
      (i.e., a fixed location or a location that is addressed
      by a control register) is copied to the address
      specified by the parameter and the parameter is copied
      to the new architected memory location.  This operation
      must atomically update the two storage location as is
      done by a simple compare and swap instruction.

      In the following example, the parameter passed to the
asynchronous operation was "A," which specifies a memory location.
We assume when the asynchronous operation completes that the new
architected memory location contains zero.  Fig. 1 shows the before
and after image of the storage locations.

      In the following example, the parameter passed to the
asynchronous operation was "A" which specifies a memory location.
However,...