Browse Prior Art Database

Program Which Controls Multiple Levels of Hardware

IP.com Disclosure Number: IPCOM000119902D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Kibashi, A: AUTHOR [+3]

Abstract

Disclosed is a technique to make a program which controls multiple levels of hardware.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Program Which Controls Multiple Levels of Hardware

      Disclosed is a technique to make a program which controls
multiple levels of hardware.

      When an IC (Integrated Circuit) is changed and new hardware is
made, normally an old program will not work on the new hardware.  So
a new control program should be released concurrently with the new
hardware.  This concurrent operation will create complications  for
mass production.  By using this technique, the new control program
will work on both the old and new hardwares and concurrent change is
no longer required.

      In a register of IC, a value is stored to indicate the
identification (ID).  In Fig. 1, IC1 has '1' on address 0 to indicate
IC1.  In the same way, IC2 has '2'.  On another address, another
value is stored to indicate the level of that IC.  Level 0 has '0',
and level 1 has '1'.  This can be done by designing the register of
that address of IC to have that value.  The address of the
identification register and level register should be the same on
different ICs so as to be read by the control program.

      By reading these addresses, the control program will switch to
a subprogram, as shown in Fig. 2.  In this way, only one program will
adapt to multiple levels of an IC and also different ICs.