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Maintaining Status/Control Register Integrate in a Multi/Asynchronous Dataflow Execution Unit

IP.com Disclosure Number: IPCOM000119951D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 3 page(s) / 106K

Publishing Venue

IBM

Related People

Hicks, TN: AUTHOR

Abstract

Disclosed is an algorithm for maintaining a status/control register, a register that controls execution of instructions and records occurrences of events, in an execution unit which permits operations (instructions) to execute out of the sequential order received.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Maintaining Status/Control Register Integrate in a Multi/Asynchronous
Dataflow Execution Unit

      Disclosed is an algorithm for maintaining a
status/control register, a register that controls execution of
instructions and records occurrences of events, in an execution unit
which permits operations (instructions) to execute out of the
sequential order received.

      The goal of the system designer is to achieve the continuous
execution of operations, with no hold-offs.  This requires efforts by
both the compiler and hardware execution units.  The compiler should
schedule dependant operations so as to minimize these hold-offs;
however, the compiler cannot predict hardware holds such as
data-cache misses.  The hardware must make an effort to recognize
these dependencies and to avoid them when possible.

      A status/control register, as inferred by the name, has two
functions.
   1. Status Recording:  As a set of architected events occur, they
are recorded in the status portion of the register, such as an
invalid operation exception.  There are two parts to the status
register.  The first part records the status of each event during the
entire course of the job (or since the status was reset). This is
referred to as "sticky" status.  The second part records the
occurrence, or nonoccurrence, of the events during the execution of
the "preceding" instruction only.  This is the "non-sticky" status.
This register is then read in order to check on the progress of the
job running.
      2. Controlling Execution:  A portion of the register contains
information that the execution unit uses to control the execution of
operations, such as when a floating-point overflow occurs.  The
result may be IEEE infinite or the maximum number the machine can
represent, depending on the control register.

      This invention is in the environment of a multiple dataflow
execution unit.  In this environment two operations may be initiated
concurrently.  These operations are of variable execution durations.
If the first operation requires multiple iterations in the pipeline
it is in, it will complete "after" the second operation, although it
is sequentially before it.  After the second operation has completed,
a third, and a fourth may possibly begin and complete before the
first instruction has completed.

      In the asynchronous execution unit described, a mechanism must
be in place to guarantee the integrate of the status/control register
at the time of execution of every instruction.  When an interrupt or
instruction control unit reads the status port...