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High-Speed Low-Power Ecl Circuit With an AC-Coupled Transient Current Source

IP.com Disclosure Number: IPCOM000119997D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 3 page(s) / 86K

Publishing Venue

IBM

Related People

Chuang, CTK: AUTHOR

Abstract

Disclosed is an AC-coupled transient current source to improve the power-delay performance of the logic stage (current switch) of ECL circuit and a biasing scheme to eliminate additional biasing devices/power of the active-pull-down transistor.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

High-Speed Low-Power Ecl Circuit With an AC-Coupled Transient Current
Source

      Disclosed is an AC-coupled transient current source to
improve the power-delay performance of the logic stage (current
switch) of ECL circuit and a biasing scheme to eliminate additional
biasing devices/power of the active-pull-down transistor.

      Recently, an AC-coupled active-pull-down scheme was invented to
reduce the power consumption and enhance the speed of ECL circuit
(Fig. 1) [1,2].  While this scheme reduces the DC power consumption
of the emitter-follower stage and improves the pull-down delay owing
to the large transient pull-down current, substantial power
consumption is still needed in the current switch to achieve fast
switching.  Moreover, additional devices are needed to implement the
biasing cir cuit for the active-pull-down transistor and the power
consumption for the biasing circuit is wasted.

      In the present scheme (Fig. 2a), resistors RS1 and RS2 form the
current source as in a regular ECL circuit.  An additional transistor
QS and a capacitor CY are added to form a transient current source
which provides a large current only during the switching transient.
Resistors RS1 and RS2 not only act as the steady-state current
source, but also form the biasing circuit for QS .  When the input
rises to 'High , the voltage at Node A follows immediately once the
input crosses the reference voltage.  This transient signal is
AC-coupled through CY to turn on QS heavily, resulting in large
dynamic current and hence fast pull-down of the collector node C.
This scheme, therefore, improves the switching speed of the logic
stage (current switch) substantially with no (or very little)
additional power cons...