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Low Stress Die Pad for Plastic Package Large Chips

IP.com Disclosure Number: IPCOM000120010D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Masson, J: AUTHOR [+2]

Abstract

Passed over a certain dimension (around 12 mm) it is said that an active device glued on a metallic die pad does not resist to thermal cycles due to material expansion mismatch. Fig. 1 shows a cross sectional view of a plastic package. Fig. 2 illustrates the known die pad design.

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Low Stress Die Pad for Plastic Package Large Chips

      Passed over a certain dimension (around 12 mm) it is said
that an active device glued on a metallic die pad does not resist to
thermal cycles due to material expansion mismatch. Fig. 1 shows a
cross sectional view of a plastic package.
      Fig. 2 illustrates the known die pad design.

      The proposed solution to this problem is to develop a "low
stress die pad".

      The low stress die pad is based on minimizing the mismatch
expansion surfaces by decreasing the incompatible surfaces attached
together, and having as much as possible top to bottom stress
equilibrium.  Fig. 3 shows the new proposed design of a low stress
die pad.

      By using the proposed low stress die pad, a better stress
equilibrium between top and bottom surface of the chip is obtained.