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Elaboration of a Large Grain Layer to Protect Barrier Layers

IP.com Disclosure Number: IPCOM000120014D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Leroy, B: AUTHOR [+2]

Abstract

In integrated circuit industry, active devices are made in silicon (Si) and interconnections in aluminium (Al). But the reaction between Si and Al generates failures (penetrations), which, in turn, causes reliability defects.

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Elaboration of a Large Grain Layer to Protect Barrier Layers

      In integrated circuit industry, active devices are made
in silicon (Si) and interconnections in aluminium (Al). But the
reaction between Si and Al generates failures (penetrations), which,
in turn, causes reliability defects.

      To prevent this degradation, one solution was to saturate Al by
2% to 3% of Si. But industrial considerations and corrosion made this
solution not adequate for small dimension connections.

      Another solution was to interpose between Si and Al a barrier
layer of a metal, a metal plus oxide, etc.  The problem is now the
discontinuities of such barrier layers: pinholes due to contamination
or imperfect metallurgy, fractures and holes due to the large relief
in small structures. As the devices become smaller, the layers are
thinner and the impact of imperfections larger. Through these holes,
aluminium flows during annealing steps, inducing penetrations and
reliability defects. Other solutions include:
 1. Double protective layer. This technique is efficient for process
pinholes, but sometimes not for contamination problems or relief
problems and,
 2. Metal sputtering. This technique is efficient against the relief
problems, but in many cases, it is not compatible with the other
process steps.

      The present disclosure aims to make the double protective layer
really efficient against both contamination pinholes and relief
problems. As the penetration is due...