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Browse Prior Art Database

Neural-Network Controller for Large Crosspoint Networks

IP.com Disclosure Number: IPCOM000120027D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 5 page(s) / 185K

Publishing Venue

IBM

Related People

Varma, A: AUTHOR

Abstract

Disclosed is a neural network-based controller for real-time arbitration of switching paths in large crossbar switches constructed from one-sided crosspoint chips. The controller allocates the active line- drivers in the crosspoint matrix so as to minimize the simultaneous- switching noise, while maximizing the number of connections that can be allowed.

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This is the abbreviated version, containing approximately 41% of the total text.

Neural-Network Controller for Large Crosspoint Networks

      Disclosed is a neural network-based controller for
real-time arbitration of switching paths in large crossbar switches
constructed from one-sided crosspoint chips.  The controller
allocates the active line- drivers in the crosspoint matrix so as to
minimize the simultaneous- switching noise, while maximizing the
number of connections that can be allowed.

      Crossbar switches are used extensively as multiprocessor
interconnection networks and for communication switching.  A limiting
factor to the cost-effective single-chip realization of such large
arrays is the inductive noise generated by the line-drivers driving
the output leads of the chip.  When a large number of these drivers
are active  simultaneously, a substantial transient current passes
through the inductance of the power distribution system, causing a
noise spike to emerge on the power lines.  This phenomenon is known
as the simul taneous switching noise or the Delta-I noise (1,2).  The
resulting fluctuation of the power-supply voltage level can cause
false switching of devices with an accompanying loss of data.

      The simultaneous-switching noise is particularly severe in
large crossbar switching chips because they have a large number of
data output lines.  This problem can be alleviated by constructing
crossbar networks using one-sided crosspoint switching chips (3).
Fig. 1 illustrates a one-sided crosspoint network with 32 ports
constructed from 8 x 4 chips.  These networks allow a pair of ports
to be connected using one of many available internal switching paths.
By choosing the switching paths properly, it is possible to
distribute the active off-chip drivers uniformly over the chip
matrix, thus reducing the Delta-I noise in each chip to acceptable
levels (4).

      In a non-blocking one-sided crossbar network, any request to
connect two idle ports can be satisfied without disturbing existing
connections.  However, when a constraint is placed on the allowable
number of concurrently-active line-drivers per chip, it is possible
that a connection-request is rejected even when a switching path is
available to connect them.  Thus, the path allocation algorithm
should perform a joint optimization of network throughput and
switching noise.   In addition, the time taken to reconfigure the
network should be much smaller than the average duration of a
connection request.  These objectives are met by a highly-parallel
artificial neural-network controller.

      The controller disclosed here assumes the synchronous or batch
mode of operation, where the connection-requests to be made are
presented to the controller simultaneously. When a set of requests is
made, the controller tries to simultaneously set up as many pairs of
connections as possible within the given constraints.  After the
desired communication is over, a new set of requests is presented,
and the entire network is recon...