Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Cascode Logic Fast Push-Pull Buffer

IP.com Disclosure Number: IPCOM000120033D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 3 page(s) / 85K

Publishing Venue

IBM

Related People

Beranger, H: AUTHOR [+4]

Abstract

The article discloses a means of implementing an NPN push-pull to buffer out a cascode logic output signal. This buffer has a very efficient power x delay product as compared to conventional emitter-follower buffers.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Cascode Logic Fast Push-Pull Buffer

      The article discloses a means of implementing an NPN
push-pull to buffer out a cascode logic output signal. This buffer
has a very efficient power x delay product as compared to
conventional emitter-follower buffers.

      The invention assumes that a regulated supply is provided to
the cascode collectors (kVBE voltage or kVBE + a Schottky forward
voltage VF, as depicted in the drawing).

      The proposed improvements in the circuit are in the control of
the buffer TPD (pull-down transistor). In essence, the out-of-phase
signal (COB) at the cascode collector node drives a very low-power
emitter follower (TE). A system of 2 transistors (TF,TG) acts as a
sort of a capacitive switch in order to overdrive the final TPD
transistor, and also provides the appropriate DC control. Let us
understand now the circuit operation in detail.

      Tfall input to Tfall output transition: Before the transition,
the R1, R2, TG bridge biases the TPD base voltage such as to have a
residual low current (30 uA, quasi-off state) in TPD. This current is
low as compared to the tree cascode current (T0X= 240 uA).  In the
bridge itself, TG is mounted as a base- collector diode (TX inverse
mode), and exhibits a precharged high diffusion capacitance (2.0 pF
at 30 uA in 1 micron ATX technology).  When the falling transition is
applied at the input, the COB node rises; this waveform is
immediately transmitted to the TE emitter, since TF, being mounted in
the same manner as TG, has its storage capacitance quickly charged
and A node rises quickly. TG capacitance transmits the transition to
TPD base, and the output node is heavily driven down until the TCL
clamp operates to limit the down level. TCL collector feeds back to
TPD base...