Browse Prior Art Database

Enhanced Manufacturing Functional Testing of Electronic Card Assemblies

IP.com Disclosure Number: IPCOM000120088D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 67K

Publishing Venue

IBM

Related People

Henderson, DJ: AUTHOR [+2]

Abstract

Disclosed is a method for functional (at speed) test of electronic card assemblies with the use of a user-definable logic emulation device containing user-definable asynchronous logic (1,2,3) to guardband the device.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Enhanced Manufacturing Functional Testing of Electronic Card Assemblies

      Disclosed is a method for functional (at speed) test of
electronic card assemblies with the use of a user-definable logic
emulation device containing user-definable asynchronous logic (1,2,3)
to guardband the device.

      When manufacturing electronic card assemblies, there are
several stages of testing performed before the card is ready for use
in the end product.  The card is checked for shorts and opens, then
each component on the assembly is tested for proper operation, and
finally, the card is tested for functionality in a product
environment.  There are many types of testers available in the
industry to perform the first tests mentioned but the functionality
test usually requires that the assembly operate in the final product
environment.

      The usual approach is to build a machine into a test fixture
and test the assembly as if it were a whole product. One of the
problems with this approach is that some card assemblies will fail
when installed into a machine later in the manufacturing process.
This can often be traced to subtle timing differences between the
"golden card set" on the test fixture and the characteristics of card
vintages currently being built.  It would be very desirable to run
the card under test on two "golden card sets", one of which exhibits
best-case timings and one which exhibits worst-case timings.  In
doing so, the probability that the card will work in any system when
the final product is later assembled becomes much higher.

      The hardware and softwa...