Browse Prior Art Database

Logic Emulation With User-Defined Asynchronous Logic

IP.com Disclosure Number: IPCOM000120090D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 3 page(s) / 100K

Publishing Venue

IBM

Related People

Henderson, DJ: AUTHOR [+2]

Abstract

Disclosed is a logic emulator device similar to a pattern generator but which provides user defined asynchronous logic emulation as well as logic emulation through pattern generation (1). The device is similar to the one described in (2) which described a logic emulation device using user-defined asynchronous logic for control of a pattern generator. This device uses the same technique but includes user- defined asynchronous logic emulation as well.

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This is the abbreviated version, containing approximately 52% of the total text.

Logic Emulation With User-Defined Asynchronous Logic

      Disclosed is a logic emulator device similar to a pattern
generator but which provides user defined asynchronous logic
emulation as well as logic emulation through pattern generation (1).
The device is similar to the one described in (2) which described a
logic emulation device using user-defined asynchronous logic for
control of a pattern generator.  This device uses the same technique
but includes user- defined asynchronous logic emulation as well.

      With this device, any number of interfaces can be emulated
using a pattern generator approach for derivation of signals, such as
data and addresses that might appear somewhat synchronously on an
interface. Other signals that require high-speed handshaking can be
generated asynchronously and the entire emulation can be controlled
with response to asynchronous events that occur on the interface
being emulated.  All of the emulation of the card is implemented
using RAM- based devices which can be programmed from a host without
the need to change physical hardware.

      The device in adapter form is outlined in the figure and
consists of the following:
EXTERNAL COMMUNICATIONS CHANNEL AND CONTROL LOGIC:

      The External Communications Channel and Control Logic consists
of a microprocessor and an interface such as the IEEE-488 interface.
The microprocessor controls the configuration of and access to
facilities on the card and communication with the external
environment via the communications interface.
ASYNCHRONOUS CONTROLLER:

      The Asynchronous Controller consists of a small amount of RAM
and user definable sequencer and controller.  The sequencer is
implemented using Programmable Gate Arrays known as Logic Cell
Arrays* or LCAs*.  These LCAs contain both combinatorial logic and
latches whose functions and interconnections are determined by
personalization bit streams loaded into RAM in the Gate Arrays.  The
user defines the logic of the sequencer through the External
Communic...