Browse Prior Art Database

In-Phase CSEF With Speedup Capacitor

IP.com Disclosure Number: IPCOM000120169D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 1 page(s) / 20K

Publishing Venue

IBM

Related People

Han, B: AUTHOR

Abstract

In conventional use of speedup capacitor in a CSEF circuit, the capacitor is placed between the common emitter node and VEE or some other convenient voltage node. The benefit is to speed up the out-phase operation while the in-phase operation suffers a significant slow-down. (Image Omitted)

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In-Phase CSEF With Speedup Capacitor

      In conventional use of speedup capacitor in a CSEF circuit, the
capacitor is placed between the common emitter node and VEE or some
other convenient voltage node.  The benefit is to speed up the
out-phase operation while the in-phase operation suffers a
significant slow-down.

                            (Image Omitted)

      In this disclosure, a capacitor is placed between the input
base and the common emitter.  The result is a much improved in-phase
operation.

      Disclosed anonymously.