Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Improving the Fault Coverage of Boundary Scan

IP.com Disclosure Number: IPCOM000120176D
Original Publication Date: 1991-Mar-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 1 page(s) / 27K

Publishing Venue

IBM

Related People

McAnney, WH: AUTHOR

Abstract

Consider an output shift register latch (SRL) during boundary scan testing: only the path through its L2 latch and onto the Scan Data Out line is tested as can be seen from Figure 1. Untested is the connection to the output driver, the driver itself, and the driver connection to the chip C-4 pad.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Improving the Fault Coverage of Boundary Scan

      Consider an output shift register latch (SRL) during boundary
scan testing: only the path through its L2 latch and onto the Scan
Data Out line is tested as can be seen from Figure 1.  Untested is
the connection to the output driver, the driver itself, and the
driver connection to the chip C-4 pad.

      These untested faults can be covered by moving the Scan Data
Out point to the chip C-4 pad, as shown in Figure 2.

      The Scan Data Out connection should be taken independently from
the C-4 pad as suggested by Figure 3.

      Disclosed anonymously.