Browse Prior Art Database

Hardware-Assisted Software Debug Facility

IP.com Disclosure Number: IPCOM000120247D
Original Publication Date: 1991-Apr-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 96K

Publishing Venue

IBM

Related People

Hicks, DR: AUTHOR

Abstract

The disclosed method involves specifying a range of addresses, as shown in the figure, except that an interrupt is made to occur upon the execution of every instruction whose address is OUTSIDE the range rather than upon the execution of every instruction whose address is WITHIN the range. When combined with appropriate supporting software, this arrangement permits greatly improved performance. The supporting software might operate as follows: 1. Upon initialization of the breakpoint facility, the BREAKPOINT ADDRESS LIST (1) is arranged in sequential order based on the numeric value of the addresses. (This assumes that the hardware executes sequential instructions in address order and in the direction of increasing numeric values.) 2.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Hardware-Assisted Software Debug Facility

      The disclosed method involves specifying a range of
addresses, as shown in the figure, except that an interrupt is made
to occur upon the execution of every instruction whose address is
OUTSIDE the range rather than upon the execution of every instruction
whose address is WITHIN the range.  When combined with appropriate
supporting software, this arrangement permits greatly improved
performance.  The supporting software might operate as follows:
1.  Upon initialization of the breakpoint facility, the BREAKPOINT
ADDRESS LIST (1) is arranged in sequential order based on the numeric
value of the addresses.  (This assumes that the hardware executes
sequential instructions in address order and in the direction of
increasing numeric values.)
2.  The address of the next instruction which will be executed in the
subject program (upon initiation or resumption of subject program
execution) is determined and is considered to be the "NEXT
INSTRUCTION ADDRESS" (2) in the following step.
3.  The NEXT INSTRUCTION ADDRESS is used to search the breakpoint
address list.  The LOW-BOUND ADDRESS REGISTER (3) is set to the
BREAKPOINT ADDRESS which is numerically less than the NEXT
INSTRUCTION ADDRESS, or to the numerically lowest possible address if
no such breakpoint address exists.

      The HIGH-BOUND ADDRESS REGISTER (4) is set to the BREAKPOINT
ADDRESS which is numerically greater than or equal to the NEXT
INSTRUCTION ADDRESS, or to the numerically highest possible address
if no such breakpoint address exists.
4.  Execution of the subject program is begun or continued with the
instruction corresponding to the NEXT INSTRUCTION ADDRESS.
5.  When the hardware detects an instruction address which falls
outside the bounds specified by the two bound address registers (or
which coincides with one of the bounds), a debug interrupt is caused,
and control is passed to debug support software.
6.  The debug support software determines if the address of the
interrupted instruction corresp...