Browse Prior Art Database

Target Translation Management by Source Program Section

IP.com Disclosure Number: IPCOM000120263D
Original Publication Date: 1997-Jan-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 4 page(s) / 272K

Publishing Venue

IBM

Related People

Scalzi, CA: AUTHOR [+2]

Abstract

Disclosed is a method of managing target machine instruction translations of source machine instructions in the emulation of a program written for a source processor architecture on a target processor of a completely different architecture, including the storing of the translations in target storage, efficiently finding existing translations, and handling the consequences of program execution mode changes, and store operations into the instruction stream.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 21% of the total text.

Target Translation Management by Source Program Section

      Disclosed is a method of managing target machine instruction
translations of source machine instructions in the emulation of a
program written for a source processor architecture on a target
processor of a completely different architecture, including the
storing of the translations in target storage, efficiently finding
existing translations, and handling the consequences of program
execution mode changes, and store operations into the instruction
stream.

      (1) described a method of locating existing target machine
instruction translations of source machine instructions in a system
emulating a source processor in a different target processor by means
of dynamic translation of source processor instructions to target
processor equivalents and saving them for reuse.  The instruction
translations of the source processor instructions are found by having
them mapped by a very large target virtual area called the
Instruction Translation Map (ITM).  There is one entry in the map for
each possible  source instruction, and it indicates whether or not an
instruction translation exists for the source instruction represented
by the entry  and, if there is one, its virtual address in another
large target virtual  area called the Instruction Translation Region
(ITR).  The translations  are performed as the source instructions
are encountered in the emulated  execution of the source program.
These are stored for execution, and possible future reuse, in the
very large target virtual area called the  ITR, which holds all
target machine instruction translations of all source machine
instructions actually executed by a program. Efficiency  advantages
can be obtained in the process of performing an emulation of  a
source program by managing the target instruction translations of
the source instructions on the basis of a source program instruction
storage section, as will be explained here.

      The ITR is organized in sections, each of which will hold the
translations of an associated source program section.  There is a
direct addressing relationship between a source section and the
target ITR section in which will be stored the instruction
translations of the source instructions in the source section.  Given
the address of a source  section, the address of the ITR section to
hold its translations can be  directly calculated.  The size of an
ITR section should be chosen such  that it is certain that any
possible normally anticipated translation of any source section will
fit in the virtual area reserved.  Since the  virtual storage area
reserved will only be backed by real storage as required by the
creation of actual translations, the assignment of a very  large
virtual storage area reserved to hold all the ITR sections is not
wasteful of storage.  The large virtual area is assigned such that,
given a source section address, the corresponding ITR target virtual...