Browse Prior Art Database

Voltage And Temperature Control for CMOS Devices

IP.com Disclosure Number: IPCOM000120440D
Original Publication Date: 1991-Apr-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 1 page(s) / 41K

Publishing Venue

IBM

Related People

Clemmons, GE: AUTHOR [+6]

Abstract

Described is a technique to increase the performance of complementary metal oxide silicon (CMOS) device circuitry. The technique couples existing power supplies with a thermoelectric cooler (TEC) and a voltage regulator to generate a controlled circuit environment for the CMOS devices. The technique provides an overall CMOS device performance enhancement of as much as twenty-five percent. (Image Omitted)

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Voltage And Temperature Control for CMOS Devices

      Described is a technique to increase the performance of
complementary metal oxide silicon (CMOS) device circuitry. The
technique couples existing power supplies with a thermoelectric
cooler (TEC) and a voltage regulator to generate a controlled circuit
environment for the CMOS devices.  The technique provides an overall
CMOS device performance enhancement of as much as twenty-five
percent.

                            (Image Omitted)

      Devices which utilize CMOS circuitry have been found to perform
up to twenty-five percent faster when the power supply is tightly
controlled at 5.3 V + 100 mV and at a temperature of 25~C.  The
concept described herein provides a means of maintaining this
controlled environment by utilizing the technique shown in the
figure.  The existing +12 V section of power supply 10 is connected
to TEC 11. TEC 11 is designed to convert the +12 V to +7 V
at a specific current and to maintain a temperature of 25~C.  The +7
V output is connected to voltage regulator 12 which regulates the
voltage to +5.3 V + 100 mV.  The regulated voltage is supplied to
section 13 which contains only those CMOS devices which are required
to perform at the enhanced performance criteria level.

      Disclosed anonymously.