Browse Prior Art Database

Offset Binary Enhances Control Loop Accuracy in a PRIV Channel

IP.com Disclosure Number: IPCOM000120561D
Original Publication Date: 1991-May-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 3 page(s) / 86K

Publishing Venue

IBM

Related People

Heise, NN: AUTHOR [+2]

Abstract

A partial response channel (PRIV) may be implemented using digital signal processing techniques. A block diagram is shown in the figure.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 53% of the total text.

Offset Binary Enhances Control Loop Accuracy in a PRIV Channel

      A partial response channel (PRIV) may be implemented
using digital signal processing techniques.  A block diagram is shown
in the figure.

      An analog readback signal from a transducer is first amplified
by variable gain amplifier (VGA).  The amplifier gain is adjusted by
a gain control feedback loop so that the output signal amplitude is
regulated.  The signal then passes through a passive equalizer, which
shapes the channel response to the PRIV criteria.  Once shaped to
this criteria, intersymbol interference is controlled.  The signal is
further processed by digital techniques after being converted to an
L-bit binary number by an analog-to-digital (A/D) converter.

      Digital processing functions are performed in each of
functional blocks 1,2,3 shown in the figure.  Even though the control
loops may appear to be continuous, computations are performed by
manipulations on L-bit numbers.

      Gain control and timing (VFO) feedback loops operate to set
correct VGA amplitude and sampling times.  Two functional blocks of
logic compute gain and phase errors. Resultant L-bit representations
of the error,        are converted to analog currents by
digital-to-analog (D/A) converters.  The currents are integrated by
loop filters Fg and Ft to control the VGA and VFO, respectively.

      When signal amplitude, sample times, and equalization are
correct, the sampled signal of a class IV system may attain only
three normalized nominal values of {+1,0-1}. The range of the sampler
is -2 to +2, and this range is sub-divided into 2**L intervals, each
of which is represented by an L-bit number.  If L=6, the sampled
value is then represented by 6 bits, and 6-bit arithmetic is used in
computations.
CONTROL LOOP OPERATION

      Binary gain and timing errors are computed in blocks 2 and 3,
respectively.  They are converted to an output current by D/A
converters.  Output currents are integrated by loop filters Fg and
Ft.

      The following binary numbering system is used to represent gain
and timing errors.
                     Bit             Correction
                     Represen...