Browse Prior Art Database

High Reliability Chip-Joining Process

IP.com Disclosure Number: IPCOM000120577D
Original Publication Date: 1991-May-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 89K

Publishing Venue

IBM

Related People

Leas, J: AUTHOR

Abstract

Disclosed is a process for joining computer chips to ceramic packages using solder bumps formed on aluminum or aluminum-copper pedestals to significantly reduce thermal stress cracking. In the preferred embodiment, the pedestals are formed by spraying the metal on the wafer. No mask or etch step is required.

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High Reliability Chip-Joining Process

      Disclosed is a process for joining computer chips to
ceramic packages using solder bumps formed on aluminum or
aluminum-copper pedestals to significantly reduce thermal stress
cracking.  In the preferred embodiment, the pedestals are formed by
spraying the metal on the wafer.  No mask or etch step is required.

      Stress fatigue cracking, which may cause flip-chip-substrate
solder bump fails, is due to the difference in thermal expansion
between the chip and substrate materials, typically silicon and
alumina, respectively.  Since the size of chips and the number of
input and output solder bump joints will increase in future products
as chip circuit density increases, without design improvements the
thermal expansion stress will also increase, reducing product
reliability.

      Among the parameters affecting the stress, in addition to the
difference in the coefficients of thermal expansion, are the
magnitude of temperature changes, the distance from the neutral point
to the furthest joint, and the space between chip and substrate.  In
particular, if the height of the bond is greater, the same thermal
expansion will bend the joint through a smaller angle and cause less
stress on the solder joint, thereby increasing the lifetime of the
joint.

      Different methods have been proposed to increase the joint
height, including a copper pedestal.  To form the pedestals, molten
metal is forced through an array of orifices by the use of gas
pressure.  The array of orifices is vibrated to break up the molten
metal stream into fine metal droplets.  The array of droplets is
allowed to fall onto the required metallized locations of the wafer
aligned beneath the nozzle to build up metal layers of increasing
thickness, each the diameter required for the pedestal. Each metal
droplet is permitted a sufficient time to solidify prior to allowing
the next metal droplet to strike the pedestal so formed.

      The size of each metal droplet is controlled by the orifice
diameter, the gas pressure, the viscosity of the molten metal and the
frequency of the mechanical vi...