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Browse Prior Art Database

K-Simulation of Three-State Devices

IP.com Disclosure Number: IPCOM000120644D
Original Publication Date: 1991-May-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 3 page(s) / 89K

Publishing Venue

IBM

Related People

Larson, BR: AUTHOR [+3]

Abstract

Disclosed is a method for calculation of three-state devices in TDA's (Test Design Automation) K Simulator (for further information, see -*-). The K Simulator is an eight-value, zero-delay simulator. The eight simulation values are: logic 0, logic 1, logic X (neither 0 or 1), logic H (high impedance), K (both 0 and 1 are possible), KH, 0H, and 1H (the last 3 simulation values are when the net can take on high impedance as well as the other simulation value). To understand how the K simulator evaluates compound net values, assume that each compound net value (K, KH, 0H and 1H) is expanded to its separate components. Each possible combination of inputs is evaluated, with the results saved. The result values are converted to one of the appropriate simulation value listed above.

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K-Simulation of Three-State Devices

      Disclosed is a method for calculation of three-state
devices in TDA's (Test Design Automation) K Simulator (for further
information, see -*-).  The K Simulator is an eight-value, zero-delay
simulator.  The eight simulation values are: logic 0, logic 1, logic
X (neither 0 or 1), logic H (high impedance), K (both 0 and 1 are
possible), KH, 0H, and 1H (the last 3 simulation values are when the
net can take on high impedance as well as the other simulation
value).  To understand how the K simulator evaluates compound net
values, assume that each compound net value (K, KH, 0H and 1H) is
expanded to its separate components.  Each possible combination of
inputs is evaluated, with the results saved. The result values are
converted to one of the appropriate simulation value listed above.
(Note if other simulation values exist, the X value is ignored.)

      TDA creates pseudo-blocks called DOT blocks to model the
dotting of device output nets to form a common net.  The three types
of DOT blocks are DOTA (AND), DOTO (OR), and DOTT (three-state).  The
DOTA and DOTO blocks are simulated the same as AND and OR blocks.
DOTT blocks require special processing because they define the
joining of nets with different controlling/non-controlling simulation
properties. (The way this definition is specified is called the nets
dotting function.)  Thus, when a net whose dotting function is AND is
joined with a net whose dotting function is OR, a DOTT block is...