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Minimum Emitter Collector-Top Bipolar Transistor by Partial Epitaxial Overgrowth

IP.com Disclosure Number: IPCOM000120658D
Original Publication Date: 1991-May-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 4 page(s) / 113K

Publishing Venue

IBM

Related People

Ganin, E: AUTHOR [+2]

Abstract

An upward-operating bipolar transistor is disclosed without parasitic emitter diffusion capacitance. The nucleation delay of UHV/CVD low temperature epitaxy over oxide with respect to silicon allows for in-situ junction formation in an oxide window of minimum dimensions.

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Minimum Emitter Collector-Top Bipolar Transistor by Partial Epitaxial
Overgrowth

      An upward-operating bipolar transistor is disclosed
without parasitic emitter diffusion capacitance.  The nucleation
delay of UHV/CVD low temperature epitaxy over oxide with respect to
silicon allows for in-situ junction formation in an oxide window of
minimum dimensions.

      Upward operating, also called collector-top (CT), bipolar
transistors promise higher performance in ECL circuits than their
conventional (emitter-top) counterparts. Two major problems must be
overcome to make CT transistors in Si practical however.  The first
is an optimum vertical profile.  While conventional means of ion
implantation or diffusion cannot produce shallow, retrograded
profiles, such profiles can be obtained with low temperature
epitaxial techniques, such as UHV/CVD (referred to as LTE hereafter)
or Molecular Beam Epitaxy (MBE).  The second problem concerns the
structure, in particular the parasitic base-emitter diffusion
capacitance in parallel with the intrinsic device. The problem lies
in the fact that the base-collector area in a conventional device is
always larger than the minimum dimension used (feature size or
feature size minus sidewall thickness).  When the device is operated
upside down, this junction becomes forward biased, causing parasitic
charge storage in the extrinsic region.  By employing a
heterojunction, minority injection in this region can be minimized.
This procedure has indeed been used for heterojunction bipolar
transistors (HBTs).

      Here a process is disclosed to make the emitter-bottom opening
the smallest feature size possible, and thus eliminating the above
structure problem.  In addition, the profile can be tailored for
upside-down operation by in-situ doping during epitaxy. Low
temperature CVD at UHV conditions shows a nucleation delay on oxide
with respect to the silicon crystal.  The onset of...