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Browse Prior Art Database

Dual Side, Bi-Level Fixture for Testing Printed Circuit Boards

IP.com Disclosure Number: IPCOM000120728D
Original Publication Date: 1991-Jun-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 4 page(s) / 111K

Publishing Venue

IBM

Related People

Dew, JA: AUTHOR [+2]

Abstract

Disclosed is a test fixture which provides the ability to conduct multi-level, two sided testing of printed circuit boards (PCBs) while accurately controlling PCB deflection.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Dual Side, Bi-Level Fixture for Testing Printed Circuit Boards

      Disclosed is a test fixture which provides the ability to
conduct multi-level, two sided testing of printed circuit boards
(PCBs) while accurately controlling PCB deflection.

      The emerging concerns regarding the potential for stress damage
to printed circuit boards during test are described in -1,2-.  PCB
deflection during test can result in damage to etch runs, connections
between etch runs and vias, solder joint failure and damage to
components.  Damage can be immediate or show up later as defects
resulting in field failures.

      The potential for PCB damage resulting from excessive
deflection is particularly high when single-step test strategies are
used.  Effective single-step test methods must provide the ability to
vary the number of probes contacting the PCB during the test cycle
and must be capable of contacting both sides of the PCB.  A
consequence of this increased test function is variable physical
probe forces applied to the PCB during the test cycle.

      This test fixture method accurately controls PCB deflection
during the application of variable spring probe forces by use of
rigid support posts.  The rigid support posts are strategically
located on both sides of the PCB to provide solid support of the PCB
while limiting the amount of deflection which can occur.

      The test fixture operates as follows.  In Fig. 1, the PCB 11,
with electronic components 13 populated on both top and bottom, is
traveling on a shuttle plate 15 to the test position.  Above and
below the PCB are sets of carrier plates.  Each set consists of a
probe carrier 17 and a support post carrier 19.  ...