Browse Prior Art Database

Thin Film Wiring Precision Timing Element

IP.com Disclosure Number: IPCOM000120757D
Original Publication Date: 1991-Jun-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 99K

Publishing Venue

IBM

Related People

Donner, EO: AUTHOR [+2]

Abstract

The large system design logic structure uses a latch trigger design definition. The clock to support this logic structure has the basic time, To, defined for latches. Trigger times and other array timings require a pulse delayed from To. Delay time could be as long as 1.5 nanoseconds (ns) for a 4-nanosecond clock cycle. This delay is significant and requires a Precision Timing Element (PTE) to delay the basic To pulse for these timing requirements.

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Thin Film Wiring Precision Timing Element

      The large system design logic structure uses a latch
trigger design definition.  The clock to support this logic structure
has the basic time, To, defined for latches. Trigger times and other
array timings require a pulse delayed from To.  Delay time could be
as long as 1.5 nanoseconds (ns) for a 4-nanosecond clock cycle.  This
delay is significant and requires a Precision Timing Element (PTE) to
delay the basic To pulse for these timing requirements.

      The logic circuits for large systems are packaged in Thermal
Conduction Modules (TCMs) where physical space is limited to logic
and array chips.  Adding stages of logic to obtain the delay is not a
solution since tolerances would not allow for precise timing.  Using
wire to obtain delays also is not a solution since wiring channels
are limited and must be reserved for the basic logical communications
between the chips.

      Today, the PTEs are external to the TCM and are very
susceptible to noise, requiring extensive electromagnetic shielding.
Conventional PTEs are passive precision delay devices
(inductive/capacitive networks with precision laser trimming) and
occupy considerable space.  It is estimated that 6 to 8 logic chip
locations would be required to provide sufficient delays for the
logic on a TCM.  As clock frequencies increase, it will not be
possible to place these precision timing devices external to the TCM.
Noise caused by the TCM pins and connectors on the PTE mounting
devices can distort the timing pulse and cause it to be imprecise.
Today, PTEs are placed very close to the TCMs, causing some physical
displacement between TCMs.

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