Browse Prior Art Database

# Reduced Execution Time Convert to Binary

IP.com Disclosure Number: IPCOM000120773D
Original Publication Date: 1991-Jun-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 4 page(s) / 157K

IBM

## Related People

Maass, KK: AUTHOR

## Abstract

Convert to binary (CVB) is an instruction that converts decimal digits expressed in binary form, into a binary number. For example, a decimal number expressed in sixteen digits (15 representing the number, 1 representing the sign of the number) can be converted into a 32-bit binary word.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 39% of the total text.

Reduced Execution Time Convert to Binary

Convert to binary (CVB) is an instruction that converts
decimal digits expressed in binary form, into a binary number.  For
example, a decimal number expressed in sixteen digits (15
representing the number, 1 representing the sign of the number) can
be converted into a 32-bit binary word.

An embodiment of a convert to binary apparatus which performs a
CVB operation to 4 cycles is illustrated in the figure.  The
apparatus of the figure converts a 15 digit + 1 sign digit decimal
number to binary form, examining the decimal digits from left to
right (most significant to least significant).

The apparatus of the figure converts a first pair of decimal
digits in the double word through a first carry save adder 902 and a
first carry propagate adder 904, and converts a second pair of
decimal digits in the double word through a second CSA/CPA pair 906,
908 before the converted number is latched up in a register (W-REG)
910.  The decimal digits in each group of four (two pairs) are
represented by letters A through D.

The W-REG 910 is a 32-bit register, the bits of which are
indicated by W0 - W31 (with W0 being the MSB).  In order to have
access to the correct bits of four decimal digits at a time and the
correct hot one values (HA-HD), the apparatus of the figure uses four
decoders 912-918 which operate as described below.

Each decimal digit is defined by 4 bits double word to be
converted.  The most significant bit (bit 0) of each decimal digit
(A0- D0) is passed through the decoder, unchanged, and is sent to the
corresponding 4-2 adder.  The decoders 112-118 produce the remaining
three bits of each digit from the 4 original bits and send them to
the appropriate adders, as illustrated.  Where the decimal digit is
an 8 (1000 bin), the decoder outputs "111" for bits 1-3 (e.g., A1-A3
or B1-B3).  Where the decimal digit is a "9" (1001 bin), the decoder
outputs "111" (the same as for decimal digit 8) and also adds a hot 1
(HA-HD) to the corresponding carry propagate adder.  The lower order
three bits of all other decimal numbers (0000-0111 binary) are passed
through to the carry propagate adders, from the decoders, in their
original form.

Each of the carry save adders 902, 906 comprises four 4-2 CSAs
(920-926 and 932-938, respectively) and twenty eight 3-2 CSAs (of the
type designated by reference numerals 928, 930, 940, 942).  The 4-2