Browse Prior Art Database

Self-Aligned Extrinsic Base

IP.com Disclosure Number: IPCOM000120800D
Original Publication Date: 1991-Jun-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 4 page(s) / 107K

Publishing Venue

IBM

Related People

Goth, GR: AUTHOR [+2]

Abstract

As the base depth of vertical NPN transistors is reduced to improve device cut-off frequency, various methods of lowering base resistance for bipolar circuit applications have been employed. One approach is to add an additional mask and implant to dope the extrinsic base region more heavily. This technique does not alter device topology, but is only partially effective in that the P++ implant is not self-aligned to the NPN Nt emitter. The use of a polysilicon base contact with a self-aligned emitter does provide a major reduction of base resistance, but requires a major increase in process complexity (N30% of M/S process) and creates many new device failure modes associated with the poly base contact topology.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Self-Aligned Extrinsic Base

      As the base depth of vertical NPN transistors is reduced
to improve device cut-off frequency, various methods of lowering base
resistance for bipolar circuit applications have been employed.  One
approach is to add an additional mask and implant to dope the
extrinsic base region more heavily.  This technique does not alter
device topology, but is only partially effective in that the P++
implant is not self-aligned to the NPN Nt emitter.  The use of a
polysilicon base contact with a self-aligned emitter does provide a
major reduction of base resistance, but requires a major increase in
process complexity (N30% of M/S process) and creates many new device
failure modes associated with the poly base contact topology.

      Here we self-align a low resistance extrinsic base to the NPN
emitter contact with no added process operations. The principle is to
perform the base re-oxidation through the emitter contact only, to
avoid boron depletion in the extrinsic base region.  A reduction of
2-4X in base sheet resistance (extrinsic) is achieved vs.
re-oxidation of the entire base region.  As shown in the drawings,
the essential steps for creating a self-aligned extrinsic base using
selective base re-oxidation are as follows:
      FIG. 1     shows the reach-through anneal process step.
      FIG. 2     shows an ion implant of the base through a
                 thin screen
                 oxide (N10-50 nm) in a base anneal step.
      FIG. 3     contacts Si3N4 (50-100 nm) deposit.
      FIG. 4   ...