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DMA Command Chaining to Support Bus Master Interleaved Memory And I/O Transfers On a Micro Channel

IP.com Disclosure Number: IPCOM000120824D
Original Publication Date: 1991-Jun-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Gatson, MS: AUTHOR [+3]

Abstract

This article describes the use of a channel descriptor block (CDB) with options in the channel control word (CCW) which provides improvements in direct memory access (DMA) capability.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 67% of the total text.

DMA Command Chaining to Support Bus Master Interleaved Memory And
I/O Transfers On a Micro Channel

      This article describes the use of a channel descriptor
block (CDB) with options in the channel control word (CCW) which
provides improvements in direct memory access (DMA) capability.

      In addition to the normal options provided with chained
commands or chained data operations the technique of this disclosure
allows the following to be defined:
   1.   the ability to define the transfer to be an I/O or a memory
transfer,
   2.   the ability to define the direction of the transfer, and
   3.   the ability to not require the chained CDBs to be contiguous
in storage.

      With this added capability, a program can initiate an operation
that includes data transfers, I/O  operations, and various interrupt
options.  These operations may be intermixed in any combination using
chaining.  This is significant in implementations where the data
transfer is either preceded or followed with I/O operations.  It can
be key in the data transfers between peer processors on a MICRO
CHANNEL*, in that a typical data transfer would consist of the
following:
      -    I/O to establish the memory window in the target memory,
      -    the data transfer up to a window boundary,
      -    I/O to move the memory window to the next area of memory,
      -    the remaining data transfer, and
      -    I/O to interrupt the...