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Self-initialized, Fused Comparator Utilizing No Standby Power

IP.com Disclosure Number: IPCOM000120848D
Original Publication Date: 1991-Jun-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Williams, T: AUTHOR

Abstract

This circuit takes address inputs available at normal row or column address times and performs a compare function without need for clocking and operates with either true or complement data. While in standby, no power is consumed. The circuit is immune to single event upset, e.g., radiation induced charge effects.

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Self-initialized, Fused Comparator Utilizing No Standby Power

      This circuit takes address inputs available at normal row
or column address times and performs a compare function without need
for clocking and operates with either true or complement data.  While
in standby, no power is consumed. The circuit is immune to single
event upset, e.g., radiation induced charge effects.

      Referring to the figure, sizes of P-type device T1 and N-type
device T2 are tailored to establish the turn-on threshold voltage of
Schmitt trigger circuit 2. Differentially delayed inputs to NAND 4
are provided by inverters I to result in a single-shot pulse to the
gate of transistor T3 after trigger 2 receives VDD during chip power
up.

      When fuse F1 is intact, node B is positive and transistor T4 is
kept off by the feedback signal from inverted signal from node B to
the gate of transistor T4. In this case, fuse F1 removes negative
charge originating from radiation-induced events and positive charge
is swept into the substrate.  When fuse F1 is removed, the
single-shot pulse momentarily activates transistor T3 at the time of
power up, pulling node B down and turning on transistor T4, thereby
maintaining the down level of node B.

      The fuse input is presented to comparator circuit 6 at node C.
The address is presented at node D, and match results are passed to
redundant decoders at output E.