Browse Prior Art Database

Improved Video Ram Read Transfer Cycle

IP.com Disclosure Number: IPCOM000120905D
Original Publication Date: 1991-Jun-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 2 page(s) / 74K

Publishing Venue

IBM

Related People

Johnson, L: AUTHOR [+2]

Abstract

In three-dimensional (3D) graphics adapters, read-modify-write loops are commonly employed to compare pixel data at a given memory address to new pixel data and, based on whether the compare operation is logically true, update the memory address with new pixel data. An example of such a read-modify-write loop is the Z or depth buffer of a 3D graphics machine. When rendering a 3D object, the present Z value of a pixel is read, compared to the Z value of the pixel being rendered, and if the compare is logically true, the new Z value is written into the Z buffer. This loop often limits the performance of a graphics machine because two memory cycles are required (read Z and write Z) of the Z buffer for every one write cycle of the destination buffer.

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Improved Video Ram Read Transfer Cycle

      In three-dimensional (3D) graphics adapters,
read-modify-write loops are commonly employed to compare pixel data
at a given memory address to new pixel data and, based on whether the
compare operation is logically true, update the memory address with
new pixel data.  An example of such a read-modify-write loop is the Z
or depth buffer of a 3D graphics machine.  When rendering a 3D
object, the present Z value of a pixel is read, compared to the Z
value of the pixel being rendered, and if the compare is logically
true, the new Z value is written into the Z buffer.  This loop often
limits the performance of a graphics machine because two memory
cycles are required (read Z and write Z) of the Z buffer for every
one write cycle of the destination buffer.  Assuming these buffers
are run in parallel, the Z buffer needs twice the bandwidth of the
destination buffer in order to run the destination buffer at maximum
bandwidth.

      One method of doubling the bandwidth of the Z buffer is to use
Video RAMs.  Z data is read from the serial port, the compare
operation is performed, and, if logically true, the new Z value is
written into the primary port.  While this data is being written, the
read of the next Z value is performed, and so on.  Since read and
write cycles can be done simultaneously, the bandwidth is doubled.

      This method works well if the successive Z buffer addresses
have the same row address.  This...