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Electron-Beam Activated Linewidth Measurement Test Site

IP.com Disclosure Number: IPCOM000120961D
Original Publication Date: 1991-Jun-01
Included in the Prior Art Database: 2005-Apr-02
Document File: 1 page(s) / 63K

Publishing Venue

IBM

Related People

Jenkins, KA: AUTHOR

Abstract

The width of conducting lines on VLSI circuits after processing is a parameter which must be measured, as it may differ from the prescribed lithographic dimension. The width can be measured by careful electron microscopy, or by using vernier structures and optical microscopy.

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Electron-Beam Activated Linewidth Measurement Test Site

      The width of conducting lines on VLSI circuits after processing
is a parameter which must be measured, as it may differ from the
prescribed lithographic dimension.  The width can be measured by
careful electron microscopy, or by using vernier structures and
optical microscopy.

      The test site disclosed here uses a combination of the vernier
concept, and the concept of electron-beam induced voltage, to make a
structure in which the vernier contact is distinguished by high
contrast, when viewed in a scanning electron microscope (SEM).

      The idea of electron-beam-induced voltage contrast is that a
conductor scanned by an electron beam in an SEM will acquire a
voltage if it is not grounded.  Thus, grounded and non-grounded
conductors will be at different voltages, and will give rise to
different shades of grey (voltage contrast) in the SEM image.

      The test site which utilizes this concept is sketched in the
figure.  The lower comb structure consists of lines spaced on
intervals of length L.  The entire comb is grounded to the substrate.
The upper structure is a series of bars, spaced on intervals of
length (L + a).  These bars are not grounded.  The first bar is
offset from the first comb bar by a distance D.  The isolated bars
will first contact the comb bar at a position number n, which depends
on the width of the lines.  Wide lines will make contact near the
start of the com...