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Junction Voltage Thermometer

IP.com Disclosure Number: IPCOM000121049D
Original Publication Date: 1991-Jul-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 3 page(s) / 111K

Publishing Venue

IBM

Related People

Spanner, RA: AUTHOR

Abstract

Test circuitry enables the forward voltage across a p-n junction to be transiently sampled while a heating current is injected to permit the thermal performance of batches of semiconductors to be measured. The design utilizes the properties of a p-n junction whereby the forward voltage is a function of junction temperature at a fixed level of forward current, while the junction temperature is a function of the power level dissipated at the junction.

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Junction Voltage Thermometer

      Test circuitry enables the forward voltage across a p-n
junction to be transiently sampled while a heating current is
injected to permit the thermal performance of batches of
semiconductors to be measured.  The design utilizes the properties of
a p-n junction whereby the forward voltage is a function of junction
temperature at a fixed level of forward current, while the junction
temperature is a function of the power level dissipated at the
junction.

      The overall test rig for thermometry is shown in Fig. 1.
Functions contained in the JVT are broken down in Fig. 2.  The
circuits of functions in Fig. 2 are detailed in Figs. 3, 4 and 5.

      The method operates by transiently switching between a level of
current used to inject heat into a junction, and a low level of
current at which calibration has been previously carried out.  Then
the forward voltage induced by the calibration current is sampled.
Thus, junction temperature can be deduced and plotted against the
dissipation level causing it.  Any semiconductor chip, having an
isolation diffusion in its epitaxial region, with available
connections, can be measured in this way, as can any device with an
accessible p-n junction.  Simultaneous measurement of case
temperature by any other means enables the value of internal thermal
resistance (Rint) between chip and case to be measured.  Switching
between current levels is effected by the 'current-switch' circuit
(Fig. 5), as is the setting of levels between which switching takes
place. Bias current is not switched and flows at all times in the
load circuit.  Its level is displayed continuously by digital
read-out.  Heating current is manually selected 'Off', the test load
is placed in an ove...