Browse Prior Art Database

Power-On Reset Control Mechanism for Multiprocessor System

IP.com Disclosure Number: IPCOM000121104D
Original Publication Date: 1991-Jul-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 3 page(s) / 103K

Publishing Venue

IBM

Related People

Fukuda, H: AUTHOR [+5]

Abstract

Disclosed is a power-on reset mechanism for the shared bus multiprocessor systems. This mechanism provides an effective power-on self-test.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Power-On Reset Control Mechanism for Multiprocessor System

      Disclosed is a power-on reset mechanism for the shared
bus multiprocessor systems.  This mechanism provides an effective
power-on self-test.

      Fig. 1 shows a typical shared bus multiprocessor (MP) system.
It consists of processor modules, memory modules, disk-controller
modules and I/O modules.  They are connected with one another through
the shared bus.  The typical processor module consists of a central
processing unit (CPU), a cache, and a bus controller (BC). The BC
maintains the cache coherency as well as the interface between the
CPU and the shared bus.  In this system, each CPU is able to work
concurrently. Continued

      The features of this disclosed mechanism are as follows:
(1) Provide the timing to start the power-on self-test. This
mechanism informs each processor of the timing to start the power- on
self-test.  With this information each processor proceeds its power-
on self-test, avoiding access conflicts among processors on the
shared bus.
(2) Improve the fault tolerance. When a processor module has a
serious error, it detaches itself from the shared bus.  Nevertheless,
the others are able to proceed with their tests.  This mechanism has
no master-processor nor slave-processors.  Therefore, the MP system
is able to proceed with its work if at least one processor module is
alive.
(3) Easy to add processor modules. This mechanism does not depend on
the number of the processor modules.  It is easy to add and remove
processor modules.
(4) Si...