Browse Prior Art Database

Salvaging Method for Defective Chips

IP.com Disclosure Number: IPCOM000121203D
Original Publication Date: 1991-Aug-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Mashima, I: AUTHOR

Abstract

Disclosed is a method for salvaging defective chips by chip-on-chip packaging method.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 84% of the total text.

Salvaging Method for Defective Chips

      Disclosed is a method for salvaging defective chips by
chip-on-chip packaging method.

      A conventional method for saving defective chips was to
implement redundancy circuits for chip functions, which has a
drawback of wasting chip area.  To avoid this, chip-on-chip packaging
is proposed to utilize defective chips.

      The basic idea of this new salvaging method is to design a
mirror image chip whose circuit pattern or chip pad pattern is in a
mirror image relationship to that of a standard chip.  The mirror
image chip may be large to include the entire circuit of the standard
chip or it may be small to include only one or more selected
functional blocks of the standard chip.  By face-to-face mounting the
mirror image chip on the standard chip, as shown in the figure, the
defective standard chip or functional block thereof can be replaced
by the mirror image chip.  When the mirror image chip is used to
replace a defective functional block, a block selector circuit is
provided to deactivate the defective block and activate the mirror
image chip.

      This scheme brings higher yields in VLSI chip production.  The
idea is applicable to VLSI chips which are designed in a macro system
that uses pre-designed large macros as building blocks.  The face-to-
face mounting of the standard and mirror image chips means that the
macros of the chips are connected in parallel and the selector
circuits on the chips ca...