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Variable Field Width Arithmetic Logic Unit for Color Data

IP.com Disclosure Number: IPCOM000121204D
Original Publication Date: 1991-Aug-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 3 page(s) / 102K

Publishing Venue

IBM

Related People

Cook, WP: AUTHOR

Abstract

This article describes a technique and hardware implementation to handle efficiently the various data formats encountered in display technologies. The hardware design is particularly applicable to a memory which can be configured to handle the different data types directly.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Variable Field Width Arithmetic Logic Unit for Color Data

      This article describes a technique and hardware
implementation to handle efficiently the various data formats
encountered in display technologies.  The hardware design is
particularly applicable to a memory which can be configured to handle
the different data types directly.

      An example of a use for this design is a single color,
electrophotographic printer having four separate toners: black, cyan,
magenta, and yellow.  Full color prints are achieved with four
imaging and toner transfer cycles with toner overlay available at
each pel.  Black toner is included to reduce color toner usage and to
create a higher quality black image.

      A separate processor (ALU) would reside either between the data
controller CPU and its display page map or alongside the CPU as a
coprocessor.  All of the ALU functions in either case could be
duplicated by CPU software, making the ALU an optional coprocessor
for enhancing performance.

      The design described assumes a 32-bit CPU for image handling.
There are two basic design techniques for image memory, planar and
packed pel.  The planar design typically has a dedicated memory
controller for each memory plane. Each data word is one bit of
information for each pel.  With an eight-bit-per-pel system, eight
words are needed to completely describe the pels regardless of the
word size. The planar design is most effective with alphanumeric or
image data and is less effective for vector graphics.

      The alternative technique, packed pels, is more effective for
vector graphics since each word holds all of the information
describing an associated pel.  With an eight-bit-per-pel system, four
pels are packed into each 32-bit word.  The image memory costs less
since only a single controller is required for the system.  This
technique is not as effective with respect to characters and images
since few pels are moved at a time.

      The described design permits both data types to be handled as
well as combinations such as gray information (monochrome) or color
data with little intensity range per primary (such as a four-bit-per-
pel system).  Each data type can be handled up to the full word width
directly in the ALU.

      The design allows each data type to be handled in hardware at
full speed one operation per cycle.  This ...