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Semiconductor Test Site to Monitor Linewidth Changes Due to Thin Film Interference

IP.com Disclosure Number: IPCOM000121250D
Original Publication Date: 1991-Aug-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 3 page(s) / 87K

Publishing Venue

IBM

Related People

Bruce, JA: AUTHOR [+2]

Abstract

A method is provided for gathering electrical line width (L/W) data by providing a bridge resistor monitor which is linked in a serpentine arrangement in the kerf area of a wafer.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Semiconductor Test Site to Monitor Linewidth Changes Due to Thin
Film Interference

      A method is provided for gathering electrical line width
(L/W) data by providing a bridge resistor monitor which is linked in
a serpentine arrangement in the kerf area of a wafer.

      Underlying topography can result in photoresist linewidth
changes.  Both resist thickness variations, and variations in
substrate reflec tivity, can lead to linewidth variations. This
effect is most pronounced on exposure tools with
monochromatic/narrow-bandwidth sources.  A method is shown for
gathering electrical L/W data utilizing improved resolution and
interrogating at a much closer pitch. Also, improved utilization of
available kerf area is realized.

      In order to predict/characterize the amount of linewidth
variation, a discrete number of structures could be measured with
either a scanning electron microscope (SEM) or by electrical
measurements. If three structures are tested, then only three resist
thicknesses at most can be represented. Referring to Fig. 1, if the
three points chosen are A, B, and C, then the linewidth range
measured is close to the actual range (0.27 out of 0.30 mm). However,
if points D, E, and F are used, then only a small portion of the
actual linewidth range is observed (0.12 out of 0.30 mm). The
difference between the two sets of points may be caused by a slight
(15 nm) shift in average resist thickness, i.e., monitor thickness,
such as caused by changes in spin speed, temperature, etc.
Polysilicon gate level resist thickness changes, for example, are
observed over various devices as a function of how well the resist
planarizes over a given dimension recessed oxide (ROX) opening. In
practice, due to the wide variety o...