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Programmable Multichannel Module Designs

IP.com Disclosure Number: IPCOM000121284D
Original Publication Date: 1991-Aug-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 3 page(s) / 98K

Publishing Venue

IBM

Related People

Gyllenhammer, CR: AUTHOR [+2]

Abstract

Registers are commonly used during chip design to store programmable features, record statistical information, and trigger internal and external operations. Generally, in multichannel designs, each channel needs its own version of these registers to operate.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Programmable Multichannel Module Designs

      Registers are commonly used during chip design to store
programmable features, record statistical information, and trigger
internal and external operations.  Generally, in multichannel
designs, each channel needs its own version of these registers to
operate.

      An example would be a communications chip that supports a link
containing 256 sub-channels.

      For each sub-channel:
       .   statistical counters are needed to count errors, and
       .   customization registers are needed to store the
programmable information.

      These register-intensive multichannel designs can be
implemented with only one "working" copy of the latch registers.  The
information for the multiple copies of the registers are stored in
memory (for example, RAM).  When a register set loaded in memory is
needed, the values can be latched into the "working" hardware
registers.  When the register set is finished, the proper memory
location can be updated if needed.

      When a memory implementation is used to store registers, the
design can be made a lot more versatile by adding a configuration
register that allows the number of channels to be programmed.

      Then, if the chip is to support 5 channels, the memory needed
to implement 5 copies of the registers can be used while the chip is
programmed to support 5 channels.  If, in the future, the chip is
needed to be upgraded to support 10 channels, the extra memory could
be added and the chip could simply be reprogrammed to support this
new configuration.

      This type of solution involves the use of normal external
memory devices to implement the register copies.

      This solution provides a virtually unlimited number of register
copies (the number limited by the amount of memory used).

      The chip hardware can be designed with programmable features
that would allow the number of register copies to be changed (either
increased or decreased) when needed.

      This type of solution creates a very versatile design that can
be programmed to support many different (and even future) needs.

      The only drawback is the need to do external memory accesses to
the slower standard memory cells to load the desired information into
the chip.

      In most designs, the benefits and flexibility far outweigh the
memory access drawback.

 ...