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Browse Prior Art Database

Microprocessor Based Attachment Device to a Hardware Simulator

IP.com Disclosure Number: IPCOM000121290D
Original Publication Date: 1991-Aug-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 4 page(s) / 156K

Publishing Venue

IBM

Related People

Eggleston, JD: AUTHOR [+4]

Abstract

This article details a hardware and microcode package providing a 'real-world' microprocessor interface into a hardware simulation model, allowing for improved system verification. Writing of behavioral models for the microprocessor and related support hardware tends to introduce errors and add to debug time due to discrepancies between the behavioral models and actual hardware. In place of behavioral models, the actual microprocessor, support hardware and microcode components of the system under development are used. By using actual system hardware and microcode wherever possible, the total system is verified with maximal reliability, accuracy and efficiency with respect to simulation coverage.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 46% of the total text.

Microprocessor Based Attachment Device to a Hardware Simulator

      This article details a hardware and microcode package
providing a 'real-world' microprocessor interface into a hardware
simulation model, allowing for improved system verification.  Writing
of behavioral models for the microprocessor and related support
hardware tends to introduce errors and add to debug time due to
discrepancies between the behavioral models and actual hardware.  In
place of behavioral models, the actual microprocessor, support
hardware and microcode components of the system under development are
used.  By using actual system hardware and microcode wherever
possible, the total system is verified with maximal reliability,
accuracy and efficiency with respect to simulation coverage.

      The package under development consisted of an Intelligent
Support Adapter (ISA) and various custom logic chips comprising the
main system.

      The Intelligent Support Adapter interfaces directly with the
custom logic hardware to perform maintenance and support functions.
The Intelligent Support Adapter consists of a control microprocessor,
its associated memory, and various Memory Mapped Input/Output (MMIO)
adapters.  Some of these MMIO adapters provide the means to perform
the required communications and hardware control functions.

      The MMIO adapters and other custom logic still in the design
phase require significant simulation to assure correct function
before committing to silicon.  Simulation models of this logic can be
built and combined, resulting in a complete system simulation model
capable of running on a Hardware Simulation Engine (HSE).  The
Support Processor User Device-II (SPUD-II) provides a means of
interfacing between the Intelligent Support Adapter's hardware-based
MMIO bus and the simulation model of the MMIO adapter(s) as in Fig.
1.  SPUD-II 1 connects points on the hardware MMIO bus 2 to
corresponding points on the MMIO interface 3 of the simulation model
in the Hardware Simulation Engine 4.  This is accomplished via a
mailbox buffer within the Hardware Simulation Engine that presents
MMIO bus data to the Service Processor Interface Software (SPIS).
This software within the Hardware Simulation Engine's Input/Output
Processor 5 monitors the state of the hardware MMIO bus and
translates it to provide the equivalent stimuli to the simulation
model's MMIO interface receivers.  This software concurrently
monitors the simulation model's MMIO interface drivers and controls
the hardware MMIO bus appropriately. This method allows simulation of
unidirectional and bidirectional signals.

      The SPUD-II interface is best described through its write and
read operations and how they relate to actual hardware operations.
In the interest of continuity, the following conventions apply:
      o    All hardware references reflect terms found in Fig. 2.
      o    A 'read' operation transfers data from the logic
sim...