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Browse Prior Art Database

Sense Amplifier for Bipolar/ BiCMOS Memory Array

IP.com Disclosure Number: IPCOM000121295D
Original Publication Date: 1991-Aug-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Chan, YH: AUTHOR [+5]

Abstract

Fig. 1 shows a common base current steering sense amplifier circuit disclosed in [*]. The circuit principle has been widely used in bipolar and BiCMOS SRAM designs. As array density increases, this circuit topology is no longer fast enough for very high-speed applications. Limitation of the circuit lies in its common collector nodes A and B. When the array density increases beyond 256 Kb, collector fan-out at nodes A and B often exceeds 128. This high number of collector dotting is making nodes A and B too capacitive for current to steer through transistors T3 and T4. The circuit switching speed is therefore significantly degraded.

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Sense Amplifier for Bipolar/ BiCMOS Memory Array

      Fig. 1 shows a common base current steering sense
amplifier circuit disclosed in [*].  The circuit principle has been
widely used in bipolar and BiCMOS SRAM designs.  As array density
increases, this circuit topology is no longer fast enough for very
high-speed applications.  Limitation of the circuit lies in its
common collector nodes A and B.  When the array density increases
beyond 256 Kb, collector fan-out at nodes A and B often exceeds 128.
This high number of collector dotting is making nodes A and B too
capacitive for current to steer through transistors T3 and T4.  The
circuit switching speed is therefore significantly degraded.

      Fig. 2 shows an improved sense amplifier circuit designed to
overcome the above problem.  The common collector nodes in the new
circuit are partitioned into multiple segments 4, each segment is
connected to an emitter of the common base current steering
transistors T3 and T4. With this configuration, the 128 collector
fan-out (used for illustration purpose here) is now reduced to only
32. Sensing speed is therefore improved.  Depending on the
collector-substrate capacitance of the technology being used, instead
of the 4 segments shown, one could also partition the common
collector nodes into any number of segments to meet the performance
need.  However, the more segments one has, the more sensing buses
(i.e., A1, B1 ... An, Bn, etc.) one will have to add.

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