Browse Prior Art Database

High Speed Bipolar Voltage/ Current Receiver Circuit

IP.com Disclosure Number: IPCOM000121296D
Original Publication Date: 1991-Aug-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Dreps, DM: AUTHOR [+2]

Abstract

The circuit described here provides a means of inputting either emitter coupled logic or current mode logic signals into an integrated circuit without a change in circuits. In application, the circuit provides this interconnect for use in gigabit serial string applications where versatility of input interconnects saves development time and provides an assortment of possibilities for different job applications. The circuit adds no additional serial jitter to the data stream that would otherwise be realized by a conventional multiplexer (mux) scheme. This is important in applications where the bit period is small in that even small amounts of crossover jitter significantly affect serial bit error rates in machines where optical-to-electrical conversions are made, and data is drawn from reconstructed clock signals.

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High Speed Bipolar Voltage/ Current Receiver Circuit

      The circuit described here provides a means of inputting
either emitter coupled logic or current mode logic signals into an
integrated circuit without a change in circuits.  In application, the
circuit provides this interconnect for use in gigabit serial string
applications where versatility of input interconnects saves
development time and provides an assortment of possibilities for
different job applications. The circuit adds no additional serial
jitter to the data stream that would otherwise be realized by a
conventional multiplexer (mux) scheme.  This is important in
applications where the bit period is small in that even small amounts
of crossover jitter significantly affect serial bit error rates in
machines where optical-to-electrical conversions are made, and data
is drawn from reconstructed clock signals.

      Fig. 1 shows conventional part arrangements compared to the
disclosed circuit.

      Fig. 2 shows the disclosed implementation.

      Fig. 3 shows the transistor level diagram of the disclosed
circuit.

      For operation of a current mode receiver according to Fig. 3:
           o    ECL is enabled, ECL and ECL- are grounded, I
               and I- are inputs.

      For operation of a voltage mode receiver according to Fig. 3:
           o    ECL is enabled, I and I- are tied to Vcc, ECL
               and ECL- are...