Browse Prior Art Database

Thermo-electrically Cooled Tape Automated Bonding Chip Pin-Grid-Array Package

IP.com Disclosure Number: IPCOM000121332D
Original Publication Date: 1991-Aug-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 76K

Publishing Venue

IBM

Related People

Mansuria, MS: AUTHOR [+3]

Abstract

Described is a packaging method whereby thermo-electric coolers (TECs) are used to cool a tape automated bonding (TAB) chip housed inside a pin-grid-array package so as to provide a directly cooled TEC package for semiconductor devices.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Thermo-electrically Cooled Tape Automated Bonding Chip Pin-Grid-Array
Package

      Described is a packaging method whereby thermo-electric
coolers (TECs) are used to cool a tape automated bonding (TAB) chip
housed inside a pin-grid-array package so as to provide a directly
cooled TEC package for semiconductor devices.

      Typically, TECs are piles of thermocouples that can move heat
from one end of the thermocouples to the other when there is an
electric current passing through them and they are occasionally
called solid- state heat pumps.  For a given TEC, the amount of heat
that can be pumped away from the cold end of the TEC depends on the
amount of electricity applied.

      The concept described herein utilizes the viability of cooling
the semiconductor chip by integrating the TECs into a package so as
to provide better thermal performance as well as better mechanical
and environmental protections to the TECs and the chip.

      The figure shows a cross-sectional view of a TEC-cooled TAB
chip in a pin, grid, array format.  Semiconductor chip 15 is bonded
onto TAB tape 16 and covered with encapsulant 14 to form the TAB
chip.  The TAB chip is soldered on top of pins 12 which were embedded
into substrate 21 with encapsulant 14 facing substrate 21.  Optional
insulator 22 is placed between the TAB chip and substrate 21 to block
unwanted heat flows from substrate 21 when the temperature of
substrate 21 is higher than that of chip 15.

      The cold end of TEC 18 is soldered onto thin copper sheet 20
which is laminated onto polymer tape 17.  Part of the polymer under
copper sheet 20 is...