Browse Prior Art Database

Level Shifted Emitter Follower BiCMOS Circuits

IP.com Disclosure Number: IPCOM000121477D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 3 page(s) / 101K

Publishing Venue

IBM

Related People

Chen, CL: AUTHOR [+3]

Abstract

In a conventional BiCMOS or BiNMOS circuit, the Vbe-loss due to emitter-follower pull-up operation results in poor circuit performance when the power supply is scaled to below 3.5V. The partial-swing output can be improved by using extra CMOS circuitry to achieve full- swing at the expense of more silicon area. Disclosed is a level- shifted emitter-follower pull-up circuit for achieving full-swing and better circuit speed.

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Level Shifted Emitter Follower BiCMOS Circuits

      In a conventional BiCMOS or BiNMOS circuit, the Vbe-loss
due to emitter-follower pull-up operation results in poor circuit
performance when the power supply is scaled to below 3.5V.  The
partial-swing output can be improved by using extra CMOS circuitry to
achieve full- swing at the expense of more silicon area.  Disclosed
is a level- shifted emitter-follower pull-up circuit for achieving
full-swing and better circuit speed.

      The basic circuit configuration of this invention can be
illustrated in Fig. 1.  In order to achieve full-swing at the emitter
output node to an up-level Vh, the base of the NPN is level-shifted
up by an amount of Vbe above the Vh level.  The shifting can be
realized by connecting the P-channel logic network to a supply of (Vh
+ Vbe).  In the meantime, the N-channel logic network is connected to
the P- channel logic network through a Vbe-shifter.  The purpose of
the Vbe- shifter is to reduce the voltage across the source and drain
nodes of the P- and N-channel FET transistors during circuit
operation.  The Vbe-shifter can be implemented either by a FET diode
having a voltage drop of about Vbe, or by other types of diodes
depending on the speed and area trade-off. Although the voltage
across the source and drain of the P- and N-channel FETs is not
increased, the voltage across the gate oxide of the P-channel FET is
increased by Vbe volts, which may be acceptable from a device
reliability viewpoint.

      A level shifted emitter follower can be implemented in a BiNMOS
circuit, as shown in Fig. 2.  The Vbe-shifter is an N-channel FET
diode. The receiving CMOS circuit is connected to the (Vh + Vbe)
supply through a level-shifting diode which ensures the total voltage
across the CMOS devices to be (Vh - Vl) volts.  The output of the
BiNMOS circuit has a high level of Vh and low level of Vl volts,
which matches with the CMOS supplies of the receiving circuits, i.e.,
achieving CMOS compatible full swing.  The N-channel FETs in the
BiNMOS circuit have the same drive as in t...