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Automatic State Machine Recovery When Entering Invalid States

IP.com Disclosure Number: IPCOM000121492D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 3 page(s) / 75K

Publishing Venue

IBM

Related People

Gyllenhammer, CR: AUTHOR [+2]

Abstract

State machines (i.e., sequential circuit) use latches to produce a logical progression from a one-bit pattern stored in the latches to another to create control and response signals that are used by other portions of the hardware.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Automatic State Machine Recovery When Entering Invalid States

      State machines (i.e., sequential circuit) use latches to
produce a logical progression from a one-bit pattern stored in the
latches to another to create control and response signals that are
used by other portions of the hardware.

      Often, the number of latches needed by a state machine causes a
number of undefined states to be created.

      For example, 10 defined states are needed to control a
structure.  Four latches would be needed to implement those 10 states
which produce 6 undefined states.

      Also, state machines are designed to have a low number of bit
transitions between the states.  The states that produce large
numbers of bit transitions are generally the ones left undefined.

      One obvious solution to the undefined state problem is to
define all the states.  This is a possible solution for the smaller
state machines but becomes almost impossible on the large ones.  For
example, a 33-state design would leave 31 states undefined, and
defining the transitions between the 31 extra states would take a lot
of time and logic.

      Reset signals are often used to force state machines into a
known state during initial power-on.  This reset signal can also be
used to force a state machine back to its reset state at any time.
This works, but has a few drawbacks.  It requires outside
intervention to produce the reset signal.  Also, reset signals are
usually connected to many areas of a chip, and these other areas will
be reset also.

      The best solution to this problem is to have the state machine
determine if it is in an undefined state.  Once it determines that
its present state is undefined, it can force itself into a known
state automatically.  This mechanism may also be used to repor...