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Sixteen-bit Operating System Fast Safe RAM Semaphore Compatibility in an Intel 80386 Paged Environment

IP.com Disclosure Number: IPCOM000121588D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 3 page(s) / 111K

Publishing Venue

IBM

Related People

Giangarra, PP: AUTHOR [+3]

Abstract

This article describes a technique for use in a personal computer system wherein single non-interruptible 386* instructions are used to ensure serialization of a pageable control block while disabled in a paging environment.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 49% of the total text.

Sixteen-bit Operating System Fast Safe RAM Semaphore Compatibility
in an Intel 80386 Paged Environment

      This article describes a technique for use in a personal
computer system wherein single non-interruptible 386* instructions
are used to ensure serialization of a pageable control block while
disabled in a paging environment.

      Fast safe RAM (FSR) semaphore application programming interface
(API) of a 16-bit operating system (OS) is used to provide mutually
exclusive access to a resource.  While both RAM and FSR semaphores
use ring 3 user data for the semaphore, FSRs also contain semaphore
ownership information in their data structure.  This information is
used in conjunction with the exitlist process termination processing
so that if a process terminates while owning a FSR, it may cleanup
and clear the semaphore so that other requests to the resource may
continue (this is not possible with RAM semaphores).  The memory for
the fast safe semaphore structure is swappable user memory, and the
semaphore is requested and cleared with the DOSFSRAMSEMREQUEST and
DOSFSRAMSEMCLEAR application programming interface (API) calls.

      There are two 16-bit fields for the owning process/thread
information to be recorded when a thread takes ownership of the FSR.
The 16 bit OS FSR code runs at ring 2 in an input-output processor
level (IOPL) segment so that it may use the clear interrupt flag
(CLI)/set interrupt flag (STI) (CLI/STI) instructions to serialize
access to the semaphore data structure.  This code has been written
to assume that it cannot be interrupted while CLI is active. In a
16-bit OS this condition is true, but in a 32-bit OS paging is
enabled and this condition no longer holds true. On the 386 with
paging enabled, a page fault can occur at any time, even when CLI is
active.  Therefore, it is possible to take a page fault between
accesses of any two fields in the semaphore structure.  This would
have the same effect as taking an interrupt.  The page fault may lead
to a context switch, with the new runner potentially examining and
modifying the fields of the semaphore and finding/leaving them in an
inconsistent state.

      In order to prevent leaving the FSRs in an inconsistent state,
the code has been modified to read the entire ownership fields on a
DOSFSRAMSEMREQUEST as a single dword (32 bits) into the EAX register,
or the entire semaphore structure into the EAX (extended AX) register
on a DOSFSRAMSEMCLEAR so that should the structure happen to cross a
page boundary, both pages the structure exists on will be made
present at the same time.  The code that follows this ownership
sequence does not touch any memory outside of the semaphore structure
so as not to cause a page fault and ruin the critical section.

      The solution requires a 32-bit memory instruction to occur in
the existing 16-bit code sequence where two 16-bit instructions
previously existed.  The following code stubs illustrate t...