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Browse Prior Art Database

CMOS DRAM Design Layout to Improve Soft Error Immunity

IP.com Disclosure Number: IPCOM000121614D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Geppert, LM: AUTHOR [+2]

Abstract

Disclosed is a circuit layout for the sense amplifiers of a CMOS DRAM that reduces the sensitivity of the chip to radiation-induced soft errors. The layout of the sense amplifier devices in a CMOS DRAM can significantly affect the soft error rate of the chip. This layout is particularly important for DRAMs built in a single-well CMOS process.

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CMOS DRAM Design Layout to Improve Soft Error Immunity

      Disclosed is a circuit layout for the sense amplifiers of
a CMOS DRAM that reduces the sensitivity of the chip to
radiation-induced soft errors.  The layout of the sense amplifier
devices in a CMOS DRAM can significantly affect the soft error rate
of the chip.  This layout is particularly important for DRAMs built
in a single-well CMOS process.

      In the figure, showing two possible layouts of a sense
amplifier, the nodes labeled "A" and "B" are the important charge
collection nodes in this device [*].  On the left, the four
transistors are stacked end-to-end in line with the bitline and the
reference bitline.  On the right, the critical charge collection
nodes, labeled "C" and "D", are placed side-by-side.  It is the net
difference in the charge collected on the two nodes A and B or C and
D which is the important factor in determining the error rate.  In
the layout on the right, the critical nodes are closer to each other.
The net charge difference collected on nodes C and D is smaller than
in the nodes A and B shown on the left.

      The layout shown on the left is the conventional layout used in
CMOS DRAMs.  The layout on the right, however, is a superior design
for reducing radiation-induced soft errors.

      Reference
(*)  L. M. Geppert, U. Bapst, D. F. Heidel and K. A. Jenkins, "Ion
Microbeam Probing of Sense Amplifiers to Analyze Single Event Upsets
in a CMOS DRAM," IEEE J ....