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Method of Avoiding Short Circuits During the Metallization of Void Covered Surfaces

IP.com Disclosure Number: IPCOM000121667D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 1 page(s) / 42K

Publishing Venue

IBM

Related People

Feyerabend, R: AUTHOR [+4]

Abstract

Ceramic substrates are metallized in a thin-film process. During this process, redundant metal is initially sputtered on the surface and then structured through a photomask by wet etching. Redundant metal is also sputtered into the voids of different size and depth with which the surface is covered. After mask exposure and development, the resist remaining in the deeper voids protects their metallization, so that such voids may lead to short-circuits between two conductors. Some short-circuits may be detected by electrical testing and be repaired. If there is an excessive number of short-circuits, the substrate is scrapped to avoid failure later on.

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Method of Avoiding Short Circuits During the Metallization of Void
Covered Surfaces

      Ceramic substrates are metallized in a thin-film process.
During this process, redundant metal is initially sputtered on the
surface and then structured through a photomask by wet etching.
Redundant metal is also sputtered into the voids of different size
and depth with which the surface is covered.  After mask exposure and
development, the resist remaining in the deeper voids protects their
metallization, so that such voids may lead to short-circuits between
two conductors.  Some short-circuits may be detected by electrical
testing and be repaired.  If there is an excessive number of
short-circuits, the substrate is scrapped to avoid failure later on.

      One approach to overcoming such problems consists in
selectively exposing the surrounding ceramic material, with the voids
acting as a mask.

      For this purpose, structures are generated by the mask image
reversal process (MIRP), utilizing optimal and controllable
parameters.  This is followed by blanket exposure and development.
In these steps, the resist is removed from the space between two
conductors.  Resist residues remaining in the voids are removed by
intensive exposure and development without the primary resist layer
covering the void having any attenuating effect.  Relatively little
energy is required for the resist defining the metal conductors, so
that their width is readily controllable.

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