Browse Prior Art Database

Parallel Switch Planes for High Performance Crosspoint Switch

IP.com Disclosure Number: IPCOM000121678D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Larsen, TA: AUTHOR

Abstract

Disclosed is a method to transfer very high speed data rates through a matrix switch by implementing the matrix function with parallel matrix planes consisting of a low cost, CMOS VLSI technology.

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This is the abbreviated version, containing approximately 64% of the total text.

Parallel Switch Planes for High Performance Crosspoint Switch

      Disclosed is a method to transfer very high speed data
rates through a matrix switch by implementing the matrix function
with parallel matrix planes consisting of a low cost, CMOS VLSI
technology.

      A detailed description of a single-sided, high performance
matrix switch is provided in [*].  This description assumes that the
data through the matrix or matrices is transmitted from one port to
another port serially. At very high data rates and large matrices,
the implementation of this function becomes increasingly difficult to
realize due to density-power limitations of high speed ECL LSI,
thereby requiring many modules.  The large number of modules, in
addition to being costly, also cause signal distortion of the high
speed interconnects due to capacitance loading.

      An alternative approach, the essence of this disclosure, is to
implement the matrix function in a number of parallel matrix planes,
transferring the port data through the matrix planes in parallel. The
number of planes would be a function of the port data rate, the CMOS
circuit performances and clocking constraints. Due to the very high
density of CMOS, a given matrix plane is generally one chip or, at
most, a few chips for the size of matrices considered (64-256).

      Port data (Fig. 1) is transferred synchronously in parallel
from the port to the matrix, through the matrix and then to the
receiving port.  The w...