Browse Prior Art Database

VLSI Module In Place Test at the Functional Card Level

IP.com Disclosure Number: IPCOM000121704D
Original Publication Date: 1991-Sep-01
Included in the Prior Art Database: 2005-Apr-03
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Judice, DE: AUTHOR [+2]

Abstract

This article describes a technique and hardware implementation which solve the diagnostic problem of multiple very large-scale integration (VLSI) modules after a card has been assembled and an in-circuit tester is not available.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 58% of the total text.

VLSI Module In Place Test at the Functional Card Level

      This article describes a technique and hardware
implementation which solve the diagnostic problem of multiple very
large-scale integration (VLSI) modules after a card has been
assembled and an in-circuit tester is not available.

      Conventionally, functional testing does not completely isolate
the numerous possible hardware faults that can occur in complex
computer systems that contain multiple VLSI modules.  The functional
tests try to exercise the hardware in a normal system operation that
might include several different VLSI modules.  At this level of
testing, it is impossible to correctly identify the failing
component. This can only result in a general error identification.
This diagnosis requires the technician to replace parts in a random
fashion.

      The hardware implementation of this disclosure is shown in the
drawing.  To improve the diagnostic isolation, an external register
is added to the card design for each VLSI module that follows the
structure design rules for VLSI logic.  The rules are required for
the actual manufacturing of the VLSI modules themselves.  The rules
provide an internal test path through the entire module for an
internal test coverage of greater than 95%.  The register's output
pins are connected to the test inputs of the VLSI module. With a
simple output command from the CPU, each VLSI module can be tested
internally before the entire system is connected...